MEN Micro’s New ESMexpress® Standard: XM1
MEN Micro’s new XM1 ESMexpress® System-On-Module, based on the new ANSI-VITA 59 (RSE Rugged System-On-Module Express) computing standard in development, brings the cost and time savings of computer-on-modules (COMs) technology to rugged, harsh and mission-critical environments. The XM1 features the first-generation Intel® Atoml® processor (Z530 at 1.6 GHz or Z510 at 1.1 GHz) based on 45-nm technology.

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Themis' scalable rugged servers, multi-socket VMEbus and Single-Board Computers are designed to meet the requirements of aerospace, data/telecom, military, and commercial markets. Themis provides open standards-based computing platforms that support Sun Solaris, Linux, and Microsoft Windows operating environments. Themis' high-performance servers, single-board computers and graphics controllers are now being integrated worldwide into advanced communications and defense systems. The Themis Computer family of system and board-level products provides the increased processing power and reliability necessary for demanding application environments while achieving a net reduction in total cost of ownership.

Definition: In electronic design a semiconductor intellectual property core, IP block, IP core, or logic core is a reusable unit of logic, cell, or chip layout design and is also the intellectual property of one party. IP cores may be licensed to another party or can also be owned and used by a single party alone. The term is derived from the licensing of the patent and source code copyright intellectual property rights that subsist in the design. IP cores can be used as building blocks within ASIC chip designs or FPGA logic designs. In digital-logic applications, IP cores are typically offered as generic gate netlists. The netlist is a boolean-algebra representation (gates, standard cells) of the IP's logical-function, analogous to an assembly-code listing for a high-level program application. The netlist protects the vendor against reverse-engineering, while maintaining portability to multiple foundry targets. Some vendors also offer synthesizable versions of their IP cores. Synthesizable cores are delivered in a hardware description language such as Verilog or VHDL, permitting customer modification (at the functional level). Both netlist and synthesizable cores are called 'soft cores', as both follow the SPR design-flow (synthesis, placement and route.) Source: Wikipedia (http://en.wikipedia.org/wiki/Semiconductor_intellectual_property_core)