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CBE - Computer Based Education
Verilog and SystemVerilog training... The way we learn has changed. The right information at the right time is key. Take our Verilog and SystemVerilog classes on-line when it's convenient for you... in your office, at home, anywhere you have Internet access. And unlike traditional EDA classes, the lab database is yours to keep! We realize that you will learn best when you actually use a needed construct. The Verilog and the SystemVerilog...
preview: http://www.computerbasededucation.com  

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Doulos - Verilog, VHDL Training
Doulos is the leader for independent know-how in leading edge methodologies for SoC, FPGA/CPLD and ASIC design. Our in-house expertise supports training and project services in VHDL,Verilog, SystemCTM, Handel-C, Perl, Tcl/Tk, e and design verification.
preview: http://www.doulos.com  

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Sutherland HDL (Training Company)
Sutherland HDL training workshops are developed and presented by engineering experts with many years of experience in design and verification. Our training workshops emphasize creating models that use logic synthesis correctly and use HDLs for design verification. Sutherland HDL now also offers training on the new SystemVerilog standard.
preview: http://www.sutherland-hdl.com  

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TM Associates, Inc.
TM Associates offers a complete complement of Verilog & VHDL training courses taught by industry leading consultants. Each instructor is an expert in their respective language and has years of design experience. Courses include introductory and comprehensive language courses and advanced courses on the most effective synthesis and verification coding styles.
preview: http://www.tm-associates.com  

newsgroup    

comp.lang.verilog
Verilog discussion newsgroup.
preview: news:comp.lang.verilog  

newsgroup    

Verilog group on Egroups
Discussion/contact group for people developing open-source freeware tools using Verilog input.
preview: http://groups.yahoo.com  

newsgroup    

VLSI Discussion Site
Newsgroup postings and discussions on soc, circuits and other chip design issues.
preview: http://www.vlsibank.com