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60% Savings on SHARC Processor Development Tools
For a limited time, you can purchase a SHARC development tools bundle at a 60% savings.
The bundle includes VisualDSP++ Development Software and the High Performance USB-based Emulator.
Click
here
for purchasing details.

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sbc
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X5-210M
The X5-210M is an XMC IO module featuring four 14-bit 250 MSPS A/Ds with a Virtex5 FPGA computing core, DRAM and SRAM memory, and eight lane PCI Express host interface.
A Xilinx Virtex5 SX95T with 512MB DDR2 DRAM and 4MB QDR-II memory provide a very high performance DSP core for demanding applications such as emerging wireless standards.
The close integration of the analog IO, memory and host interface with the FPGA enables real-time signal processing at extremely high rates exceeding 300 GMACs per second.
preview:
http://www.innovative-dsp.com

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sbc
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X5-400M
PCIe XMC Module - Two 400 MSPS, 14-bit TI ADS5474 ADCs and Two 500 MSPS, 16-bit DACs, Virtex5 FPGA and 512 MB Memory.
The X5-400M is an XMC IO module featuring two 14-bit, 400 MSPS A/D and two 16-bit, 500 MSPS DAC channels with a Virtex5 FPGA computing core and PCI Express host interface on a standard XMC module.
A Xilinx Virtex5 SX95T FPGA with 512 MB DDR2 DRAM and 4MB QDR-II memory provide a very high performance DSP core for demanding applications such as emerging wireless standards.
The close integration of the analog IO, memory and host interface with the FPGA enables real-time signal processing at extremely high rates exceeding 300 GMACs per second.
preview:
http://www.innovative-dsp.com

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project
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Haskell DSP Libraries
The project is an implementation of DSP and related algorithms in the programming language Haskell.
preview:
http://sourceforge.net
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project
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SPIRAL Project
The goal of SPIRAL is to automate the process of implementation, optimization and platform adaptation of DSP algorithms.
In the following we give a brief overview on our approach to achieve this goal.
For more detailed information, please visit our publications section.
preview:
http://www.ece.cmu.edu
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repository
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The Stony Brook Algorithm Repository
This WWW page is intended to serve as a comprehensive collection of algorithm implementations for over seventy of the most fundamental problems in combinatorial algorithms.
The problem taxonomy, implementations, and supporting material are all drawn from my book The Algorithm Design Manual.
preview:
http://www.cs.sunysb.edu
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book-classic
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C Algorithms for Real-Time DSP
Basic principles of digital signal processing and C programming.
Succeeding chapters introduce the basic real-time DSP programming techniques and typical programming environments used with DSP microprocessors; cover the basic real-time filtering techniques; and present several real-time DSP applications, including speech compression, music signal processing, radar signal processing, and adaptive signal processing techniques.
preview:
http://www.amazon.com
date: 1/1/1995
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article
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Multicomputer software development systems come of age
It was not so long ago that the typical DSP development package was a set of optimized libraries, plus a port to the industry standard Vector Signal Image Processing Library (VSIPL) and a driver for an RTOS.
While these are still essential elements for algorithm development, the platforms that host DSP applications have become much more complex, offering FPGA front ends and multicompute engines for DSP and general purpose processors for back-e...
preview:
http://www.mil-embedded.com
date: 4/2/2008
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Arrow and ADI bring you a free on demand Webcast that will demonstrate the superior ability of the new ADSP-BF51x Blackfin processor family.
This single-core, convergent processor reduces cost, power consumption, software complexity, and development schedules in a broad spectrum of applications and system designs.
The Webcast will highlight the new features of the ADSP-BF51x such as IEEE1588 on eMAC, SDIO, CE-ATA, eMMC, and stacked SPI Flash.
Click
here
to register for this free Webcast.

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