| |
| | |
home
>
chip design
>
config.
processors
> tutorials, universities, projects...
| |

Mentor Graphics
View Technical Publication Library

| |
-
tutorial
 -
myCSoC: Design Explorations With Your Configurable System on a Chip
Triscend Corp.
has developed a configurable system on a chip (CSoC) that combines programmable logic with an 8032 microcontroller core in a single device.
Application software runs in the 8032 with assistance from peripherals built with soft modules in the programmable logic.
Combined with their FastChip development software, you can now design systems where both the software and hardware can be changed at a moment's notice.
preview:
http://www.xess.com
-
university
-
Berkeley Reconfigurable Architectures, Systems, and Software - BRASS
The emergence of high capacity reconfigurable devices is igniting a revolution in general-purpose processing.
It is now becoming possible to tailor and dedicate functional units and interconnect to take advantage of application dependent dataflow.
Early research in this area of reconfigurable computing has shown encouraging results in a number of spot areas including cryptography, signal processing, and searching
preview:
http://brass.cs.berkeley.edu
-
project
-
Zippy - A Novel Dynamically Reconfigurable Processor
The ZIPPY project aims at the investigation and development of a dynamically reconfigurable embedded processor architecture.
This architecture will integrate blocks of a novel adaptive computing structure with standard processor components such as CPU core, caches, on-chip memories, and controllers.
preview:
http://www.zippy.ethz.ch
-
article
-
White Paper: The What, Why, and How of Configurable Processors
Nanometer ASIC design is a costly, risky business.
While million-dollar mask costs get most of the attention from the technical press, mask costs are just the tip of the iceberg.
Design costs for ASICs with tens or hundreds of millions of gates can easily cost $50 million or more.
With those stakes, it makes sense to use every means possible to reduce the risk of design failure.
Configurable processors can help your ASIC design team meet perfo...
preview:
http://www.embedded-computing.com
date: 7/31/2008

-
linux
-
Linux on Xtensa
This portal is the primary resource for the community of developers and users of the Linux operating system on Xtensa processors.
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core.
Processor and SOC vendors can select from various processor options and even create customized instructions in addition to a base ISA to tailor the processor for a particular application.
You have...
preview:
http://www.linux-xtensa.org
-
blog
-
Paula Jones Tensilica Blog (Corporate Sponsored)
All the news you're looking for from Tensilica, Inc. Find out how you can use Tensilica's configurable, extensible processors to speed your SOC design.
Learn more about our XPRES compiler, which automates the creation of processors from your C code.
preview:
http://www.tensilica.blogspot.com
-
rtos
-
C/OS-II
µC/OS-II, The Real-Time Kernel is a highly portable, ROMable, very scalable, preemptive real-time, multitasking kernel (RTOS) for microprocessors and microcontrollers. µC/OS-II can manage up to 63 application tasks.
Over 100 microprocessor ports available to DOWNLOAD.
preview:
http://www.micrium.com

 |

| 
| 
Micrium, the leader in embedded system software components (also known as middleware), designed to shorten your product time to market.
Micriµm is well known for it's Real-Time Operating System called 'µC/OS-II', a portable, ROMable, scalable, preemptive real-time, deterministic, multitasking kernel for microprocessors, microcontrollers and DSPs. µC/OS-II allows you to create up to 250 application tasks.
 | 
| 
|
|
|
| |